HDI fabrication guide

HDI microvia design rules that survive fabrication

A microvia that passes DRC and fails in reflow was designed outside the process window. Aspect ratio, capture-pad annular ring, fill and stagger pitch are the four numbers that decide whether a laser-drilled stack survives thermal cycling. None of them are optional at 0.4 mm pitch.

Aspect ratio

Depth over diameter is the rule that governs everything else

A microvia is laser-drilled and stops on an inner capture pad. The beam produces a tapered sidewall, so the hole is wider at the surface than at the bottom, and the plating has to reach the bottom uniformly. The aspect ratio — dielectric depth divided by the surface diameter — decides whether the plating chemistry can circulate.

IPC-6012 Class 3 puts the practical limit at 0.75:1, with 0.60:1 as the number to design to. A 100 µm laser drill therefore implies a dielectric no thicker than about 65 µm. Push past 0.8:1 and the fabricator is likely to refuse the build, or accept it and produce knee voids that crack in thermal cycling.

HDI microvia design limits and the failure each one prevents.
RuleDesign targetProcess limitFailure if violated
Aspect ratio (depth:diameter)0.60:1 to 0.75:1Above 0.80:1 refused by most fabsPlating voids, barrel cracks
Laser drill diameter75 to 100 µmBelow 65 µm needs special toolingExcess taper, poor capture-pad contact
Capture-pad annular ring75 µm radial minimumBelow 50 µm radialDrill wander, pad tear-out
Via-in-pad fillIPC-4761 Type VII copper fillUnfilled or non-planarized resinSolder wicking, voiding, head-in-pillow
Stagger pitch (centre to centre)150 µm or moreBelow 125 µmDielectric breakdown between barrels

Reliability

Stacked or staggered, and why it matters at reflow

A stacked microvia puts one via directly on top of another so the connection runs straight down. It saves routing area and it concentrates thermal stress in a single column. Laminate expands about 50 ppm per degree Celsius in z while copper plating moves about 17, so a lead-free reflow at 260 °C pulls the via base away from its capture pad. Stacked structures are allowed, but they are a reliability decision that belongs in the fabrication notes.

Staggering offsets each layer's vias so the stack is not continuous. A 150 µm centre-to-centre offset leaves enough dielectric between barrels to survive thermal cycling and prevents conductive anodic filament growth between them. Below 125 µm the dielectric web is too thin and the fabricator will usually reject the design.

Assembly

Via-in-pad needs a fill and a planar surface

Below 0.65 mm pitch there is no room to escape a BGA without putting vias in the pads. An open via in a pad wicks solder away from the joint during reflow, which produces a void or a head-in-pillow defect that passes X-ray and fails in the field.

The fix is IPC-4761 Type VII: copper-filled, plated over and planarized. Specify it in the fabrication notes, confirm the fab can fill and cap the diameter you are using, and design the pad so the fill is inside the land rather than proud of it. If the fab cannot hold planarity, move the via out of the pad and use a short dog-bone instead.

Stackup symmetry and microvia span are set in the Stackup planner; the DFM rules that follow from them are on our DFM/DFA layout service page.

FAQ

Common questions

Design to 0.60:1 and never exceed 0.75:1 for IPC-6012 Class 3. A 100 µm laser drill with 60 µm of dielectric is a comfortable build; the same drill with 80 µm of dielectric is a reliability question you have to argue with your fabricator.

Want this worked through on your board?

Send the stackup and interface list and we will check the HDI stackup against a real layout — before the quote is fixed, not after.